Robustness aware high performance high fan - in domino OR logic design ∗
نویسنده
چکیده
A novel technique using a keeper with a simultaneous low supply voltage and low body voltage is proposed to improve the overall performance of high fan-in OR gates without modifying the physical dimensions of the keeper. Simulation results of a 16-input domino OR gate using 45 nm CMOS technology show that the proposed technique could trade off between a high power/speed efficient operation and the robustness to noise effectively. Also, a Monte Carlo analysis indicates that the proposed domino OR gate is more robust to parameter variation compared to a conventional domino OR gate.
منابع مشابه
Domino logic designs for high-performance and leakage-tolerant applications
Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage. In this paper, we propose several domino logic circuit techniques to improve the robustness and performance along with leakage power. Lower total power consumption is achieved by utilizing proposed techniques. According to the simulations in TSMC 65 nm CMOS process, the proposed c...
متن کاملVlsi Design of Low Power High Speed Domino Logic
Simple to implement, low cost designs in CMOS Domino logic are presented. These designs require less transistors and are full Domino logic compatible while they attain better performance compared to the standard Domino logic implementations. Wide fan-in logic such as domino circuits is used in high-performance applications. Dynamic domino logic circuits are widely used in modern digital VLSI ci...
متن کاملSystematic Design of High-Speed and Low-Power Domino Logic
Abstract: Dynamic Domino logic circuits are widely used in modern digital VLSI circuits. Because it is simple to implement, low cost designs in CMOS Domino logic are presented. Compared to static CMOS logic, dynamic logic offers good performance. Wide fan-in logic such as domino circuits is used in high-performance applications. Domino gates typically consume higher dynamic switching and leakag...
متن کاملDesign of Mt-cmos Domino Logic for Ultra Low Power High Performance Ripple Carry Adder
As the requirement of low power high performance arithmetic circuits, in this paper we introduced a design of new MT-CMOS domino logic and FTL dynamic logic technique to design adder circuit. The MT-MOS transistors reduce the power dissipation by minimizing sub threshold leakage current in domino logic circuits introduced. The MT-NMOS transistor connected in discharging path of output inverter ...
متن کاملDesign Consideration of Dual Threshold Logic for High Performance and Ultralow Power Carry Look-Ahead Adder
This paper presents the design of high performance and ultralow power 8-bit carry-look-ahead adder circuits using two-phase modified dual-threshold voltage (dual-VT) domino logic method with the feed through logic concept. The proposed concepts are provides lower delay and dynamic power consumption; due to these two advantages it perform better in high fan-out and high switching frequencies. Th...
متن کامل